The smallest PDP-11 ever!

62.5 by 25mm. That is how big the smallest ever PDP-11 system is, based on the CYC1000 FPGA board from Trenz Electronic. It’s not a small PDP-11 though – it is a full PDP-11/70 with PiDP11 front panel console, RH70+RP06 disk, DEUNA ethernet controller, and two serial ports. Ok, it is a bit bigger if you connect all that, but still smaller than all the other boards I’ve worked on so far.

The FPGA is Altera/Intel’s latest generation Cyclone, and it is pretty fast – it runs the CPU of the PDP2011 at 12Mhz. There is an FTDI chip that is used for programming the board; it can be used as a console port as well. And a 8Mbyte SDRAM chip, 8 leds, two really tiny buttons, a 2×6 pin row suited for connecting PMODs … exactly what we need to run PDP2011 on!

To make connecting the PiDP11 front panel easier, I have designed a ‘shim’, a small board – also 62.5 by 25mm – to be mounted under the FPGA board. It maps the GPIOs to the side of the FPGA board to a 40 pin header for the PiDP11 panel, and a 2×6 pin header for an extra serial port.

If soldered together, it is small enough that the whole thing will nicely fit into the PiDP11 case, and the back panel will still fit. I don’t think that will be the case if the two are connected with sockets… but, since the CYC1000 is also the cheapest board I’ve seen so far, I don’t think sockets are really needed.

In the next weeks, I will write up a howto for the boards, and add the bitstreams for the FPGA to the download page. I haven’t made up my mind if I will be selling the shim (maybe even as a kit with all the headers you’d need) or if I will just publish the gerbers so everyone that wants one can order from their favourite PCB shop themselves. If you’re interested in either option, let me know – that’ll help me make up my mind!

A possible issue with SDHC

The new SDHC capable RH controller works great. I’ve mainly used it for 2.11BSD so far, and everything works faster, more responsive, and nicer with it. Compiling the kernel, playing with Ingres – no problems at all.

But this little command line:

while true; do /usr/games/fortune;echo;echo;sleep 2;done

after a random number of fortunes bombs out with the message

true: cannot execute

and it doesn’t with the old style controller.

I’m not sure I’m able to explain properly how weird this is. But it correlates perfectly well with the new controller, and I’m able to reproduce it easily (although it may take a couple of hours of running the while loop before it occurs). All other likely causes – clock speed too high, card broken, issues with the board or FPGA, memory etc – have been excluded.

I’ve been thinking for a couple days on how to isolate the issue, but that isn’t easy – it doesn’t predictably occur, and I’m not sure yet where to go looking. Maybe the best for now is to continue with what I wanted to do anyway – check the old XXDP test programs against the new controller, and add multiple disk support. There’s a good chance that will help finding what causes this.

In the meantime, I don’t think this should stop you from using the SDHC version – other than this weirdness, it seems pretty stable, and everything else I’ve thrown at it works fine. But keep an eye on things, do your backups, and be sure to contact me if you see something similarly weird happening!

SDHC

It’s been a long time coming, but I’m happy to announce that I have finally finished SDHC support. Ehh, well, just for the RH/RP06 though. And the RH still only supports just one disk.

The reason it took so long is that besides just adding SDHC I’ve also redone enough of the disk controller that it now only claims the bus to do high-speed, max 256 cycle transfers – basically, reading or writing a whole sector in one go. The old controller would lock the bus from the moment the ‘go’ bit in the controller was set, until the end of the transaction – and, depending on the card speed and the length of the transaction, that could take a really long time.

The old controller would also run the interface to the SD card at the CPU clock speed, but the new one uses a fixed 25Mhz clock – usually at least double the CPU speed. Although a lot of time in the card interaction is still going to be spent waiting for the card to finish reading or writing a sector and I think most of that waiting is not dependent on the interface – but it will still make a bit of difference.

I did some simple benchmarking to see how much faster the new controller would be.  For the first test, the run was as follows: load a copy of my 2.11BSD system onto a card, then run time make in the /usr/src/sys/PDP2011 directory – once on my old DE0Nano with the old controller, and once on another DE0Nano with the new controller:

de0n old : 1624.8 real       945.2 user       496.0 sys     (100/14=7.14)
de0n new : 1570.4 real      1000.6 user       263.3 sys     (90/14=6.42)

Hmm, a bit faster, but not as much as I had hoped for… and, I’m not quite sure why, but with all the console stuff enabled, I couldn’t get either board to run at full speed; the max I could get out of the old version was some 7Mhz at the cpu, and 6.42 for the new version. Surprising, since there shouldn’t be a direct speed impact in most of the console logic… it’ll need some debugging. In the meantime, to make the test of the SD controller a bit more interesting, I did a run with the console stuff disabled:

de0n new : 1082.8 real       626.4 user       159.4 sys     (140/14=10 - without pidp11 console)

Ah, that’s more like it!

Then, for a second test, I was curious how fast different types and brands of cards would go. So, I took a handful of fairly low end but current micro-SDHC cards against my old micro-SD (without HC). Not entirely fair of course, since there is about a 10 year age difference… but then, the cards I checked were the cheapest I could find from a local supplier. Oh, I’m not at all sure all SDHC cards are from the same generation, so don’t read too much into the brand name columns…

san old    1897.0 real       623.1 user       149.2 sys     (Sandisk SD (not HC) 512Mb >10 years old)
san grey   1070.8 real       628.7 user       152.9 sys     (Sandisk Ultra Class-10 UHS1 16GB 'up to 80MB/s')
san red    1059.8 real       626.9 user       155.4 sys     (Sandisk Ultra Class-10 UHS1 16GB 'up to 98MB/s')
adata      1020.6 real       633.1 user       152.6 sys     (Adata Premier UHS-1 Class-10 16GB)
transcend  1053.4 real       632.7 user       151.7 sys     (Transcend Premium UHS1 32Gb 'up to 90B/s')
kingston   1047.0 real       630.2 user       152.7 sys     (Kingston Class-4 8GB)

So, almost twice as fast, I hear you think. Well, maybe even better, and that’s something I should probably already have mentioned for the first test: one of the things with the long and frequent locking of the bus is that it would cause missed clock interrupts – basically, that occurs whenever the bus is locked longer than one timer interrupt. And with the heavy I/O during a kernel build… those missed interrupts easily cause the clock to run slow by more than a minute with the old controller, but it’s dead on with the new one. But the ‘time’ command doesn’t know about that… Compare the ‘de0n old’ time of 1624.8 real with the ‘san old’ time of 1897 real, and then factor in the difference in clock speed as noted by the user time… oh, and the difference in sys time? that’s also the time that the bus is locked waiting for the card, excluding clock skew caused by missed interrupts.

The new controller causes the system to remain a lot more responsive under load, it’s really noticeable if you try to login another telnet or serial connection while a build is running. And the disk reporting in vmstat and iostat finally make some sense… in the old version, that didn’t work because the CPU didn’t notice any elapsed time as it was basically frozen during I/O.

I’ve mainly tested the new controller with 2.11BSD and RSX-11MP, and only as RP06. I don’t think that surprises are likely with the other OSses though, but you never know – and, unlike the old version, the new version hasn’t been tested against the old RM test programs yet. I had kind of hoped to add support for multiple disks in the same go, but I hadn’t counted on the complexity of the RH70/RH11 controller in combination with the disks – where some of the control registers are part of the controller, and some are in the disk. So to support multiple disks, it will become necessary to rework those registers that reside in the disk into multiples as well. Not really a trivial exercise. Similarly, I had also hoped that reworking the RK and RL controllers to use the new shared SDHC-SPI backend. No luck though, there’s still a bug in the RK that I can’t find, and I’ve not had time to even start on the RL.

So all of that will have to wait till the winter. Meantime I’ll put up a tar of the latest sources on the download page, but, it’s at best beta quality for now, and as I said, only the RH/RP06 is new, RK and RL are still old.

Oh. Almost forgot. The new controller does use a bit more resources than the old one did – that shouldn’t really be a surprise, since it does implement an extra buffer, and copying from and to it. In comparison with some of the other parts of the PDP2011 system it’s not that big of a deal though. But, maybe the old DE0 board is really too small now.

And another thing: I changed the debug/status LEDs for the new controller. LED0 is now off when the card is online, on when it is not – or while recovering from an error. LED1 is on when the card is not SDHC, off when it is. LED2 is on while doing a read. LED3 is on while doing a write.

Wiring

As a byproduct of the PiDP-11 console support, I’ve defined a more or less ‘standard’ pin layout for the 40-pin connector on most of the Intel/Altera/Terasic FPGA boards – obviously carrying all the signals for the console itself, but also for the most basic peripherals that all PDP2011 systems need: a serial port for the console, an additional serial port, and the SPI interface signals for the Ethernet chip and the sd card for a disk. Basic, for sure, but also more than enough for enjoying the PDP-ness, and all of it conveniently fits on the 40 pins.

In the history of PDP2011, I’ve been using jumper wires to make all the required connections. That was easy enough with the older boards, as those usually had serial port and card connectors already – so mostly only some debugging stuff or the PMODNIC100 needed to be hooked up. But, DE0Nano was already a bit more of a challenge – mostly because there weren’t enough power pins to make direct connections to several PMODs. And then the console… well, the Raspberry Pi marketplace does have 40-pin jumper cables, those do come in handy. But, I’m thinking about a standard peripheral board to connect FPGA board, console panel, serial ports, sd card, and the PMODNIC100 together.

So far, I’ve set up the standard pin layout for three boards – obviously DE0Nano, but also DE10-Lite and DE0-CV. Like so:

To de0nano pin de10lite pin de0cv pin connector pin
rx1 PIN_T9 PIN_V10 PIN_H16 1
tx1 PIN_F13 PIN_W10 PIN_A12 2
rx2 PIN_R9 PIN_V9 PIN_H15 3
tx2 PIN_T15 PIN_W9 PIN_B12 4
panel_row[1] PIN_T14 PIN_V8 PIN_A13 5
panel_row[2] PIN_T13 PIN_W8 PIN_B13 6
panel_col[2] PIN_R13 PIN_V7 PIN_G17 7
rts1 PIN_T12 PIN_W7 PIN_D13 8
xu_debug 9
cts1 PIN_T11 PIN_V5 PIN_G17 10
VCC5 11
GND 12
panel_col[1] PIN_T10 PIN_W5 PIN_G14 13
sdcard_miso PIN_R11 PIN_AA15 PIN_J18 14
panel_xled[2] PIN_P11 PIN_AA14 PIN_J19 15
panel_xled[3] PIN_R10 PIN_W13 PIN_G11 16
panel_col[8] PIN_N12 PIN_W12 PIN_H10 17
panel_xled[4] PIN_P9 PIN_AB13 PIN_J11 18
sdcard_sclk PIN_N9 PIN_AB12 PIN_H14 19
sdcard_cs PIN_N11 PIN_Y11 PIN_A15 20
sdcard_mosi PIN_L16 PIN_AB11 PIN_J13 21
panel_xled[5] PIN_K16 PIN_W11 PIN_L8 22
panel_col[9] PIN_R16 PIN_AB10 PIN_A14 23
panel_col[6] PIN_L15 PIN_AA10 PIN_B15 24
panel_col[7] PIN_P15 PIN_AA9 PIN_C15 25
panel_col[5] PIN_P16 PIN_Y8 PIN_E14 26
panel_col[3] PIN_R14 PIN_AA8 PIN_G18 27
xu_mosi PIN_N16 PIN_Y7 PIN_E16 28
VCC3.3 29
GND 30
panel_col[4] PIN_N15 PIN_AA7 PIN_F14 31
panel_col[10] PIN_P14 PIN_Y6 PIN_G15 32
panel_col[11] PIN_L14 PIN_AA6 PIN_G16 33
xu_cs PIN_N14 PIN_Y5 PIN_F12 34
xu_miso PIN_M10 PIN_AA5 PIN_G16 35
panel_row[0] PIN_L13 PIN_Y4 PIN_G15 36
panel_col[0] PIN_J16 PIN_AB3 PIN_G13 37
panel_xled[0] PIN_K15 PIN_Y3 PIN_G12 38
xu_sclk PIN_J13 PIN_AB2 PIN_J17 39
panel_xled[1] PIN_J14 PIN_AA2 PIN_K16 40

The actual pin layout and the signals that go on the connector are already pretty much fixed – I’d like of course to be able to add more, like RTS/CTS  for the second serial port, but there aren’t enough pins and I don’t see which others I could take out – except maybe xu_debug, but that’s only one. What I am still thinking about is to make a small PCB that connects everything together; but there is a surprising number of details to consider. I should probably do my next post on that subject.

Meantime, I’m working on a new sd card controller that will support SDHC cards, finally!

Console

It’s been a long time coming: the support for Oscar Vermeulen’s PiDP-11 console – in fact, I’ve been working on it, on and off, for over two years. Not that it was particularly difficult, but other things got in the way. The latest of those ‘other’ things was probably the worst so far – the roof of my work room started leaking, and directly above the table with all my FPGA setups on it. In short, I was lucky because I was at home and noticed immediately when the dripping started. But on the other hand I’m still months away from a return to normal, and I haven’t decided yet if I will ever restore my work room to its previous state of joyful disorder.

Back to the console. People have requested some kind of console like interface since I first published about PDP2011, and before Oscar came around, I always said that it was going to be very, very difficult. But something in my mind fired a spark when I saw the prototype panel he had made, and not long after I had the basics of the interactions done – and a sort of proof that it could be done. But interfacing the real panel also came with a couple challenges – that I had hoped to finish before the 2018 summer holidays, but looking back that was a bit too optimistic.

Still, at that time I was convinced it would only take one major change to finish things – the workings of the address selector knob. Again something that I had worried about, but that after I worked out how, it was actually not that difficult. But something unexpected did turn out to be difficult: how to actually drive the LEDs on the console.

In fact there were two challenges. First, to make the LEDs update as smoothly and frequently as possible without ghosting – lighting LEDs that aren’t driven by the intended signals. For the LEDs on the FPGA boards I was using for development that is not an issue, since all LEDs are directly connected to outputs. But on the PiDP-11 console panel, the LEDs are multiplexed and driven by a UDN2981A darlington array IC – and that really limits the speed by which the console can be updated. I’ve found that if the update speed is higher than about 30kHz, ghosting becomes visible – although it is a bit dependent on the types of LED, because my lab test board can deal with a bit higher speed. Then, also, the multiplexer itself needs several cycles to drive the banks of leds and read the switches. After some iterations to find out what works best, including cycles to switch from output to input and vice versa, and pause cycles in between driving banks of LEDs to further reduce ghosting, I’m now using 16 cycles to fully update the panel. Combine that with the (somewhat slower than full) speed I’m using to drive the multiplexer, in the setup I’m using now, the panel gets a complete refresh at a rate of about 435Hz.

And that brings me to the second challenge. At first, I thought it would be enough to show the state of a signal when the corresponding LED would be updated – in essence, taking a semi-random sample and showing that until the next refresh. But that turned out to be insufficient; some of the well-known wait loop displays didn’t work very well, and also the EKBA test program did not show the correct values. So I came up with the idea to do a simple or – if the signal was on in the period between panel updates, it would set the corresponding LED on. That also didn’t work very well… so with some reluctance, I should admit, I decided to implement the theoretically best solution given the multiplexed nature of the console: a counter that tracks how many cycles a signal is on, and setting a threshold for how many cycles will cause a LED to be on.

I was a bit worried that having adders for each of the LEDs on the console would make a real dent in the FPGA capacity, but no problem there. And it passes all the tests that the previous solutions didn’t – the wait loops look convincing, and all the well-known values appear as they should.

So, after some weeks of experimenting, playing with old software and running tests to establish the right values for the console update cycle and the LED threshold, that’s where I am now. There are still a couple of differences with a real console that I am aware of (and very likely a lot more that I’m not, but I’m counting on you to help me with those…)

  • On a real 11/70, the pause led lights up on a memory access – that is, a ‘real’ access, not one that is found in the cache. But since PDP2011 doesn’t have a cache, if I’d follow that pattern, the pause led would be lit all the time – correctly according to the description, but also different than ‘the real thing’ – most of the time. So I made a somewhat arbitrary decision not to set the pause led for memory access. It does still light up for NPR access, such as when one of the disk controllers is using the bus.
  • PDP2011 only shows the instruction word in the bus register – not the subsequent fetches. It’d probably not be overly complicated to implement, but for now, I kind of like it this way.
  • The microcode adr FPU/CPU display is completely different. The microcode state numbers make no sense for PDP2011, and also, when I tried to implement a couple of the more obvious ones, I found that the resulting display did not look very convincing in practice. So what I did instead is that I assigned one LED to each of the major instruction groups; so now the display gives a quick overview of what kind of instructions make up the bulk of the work for the CPU.

On top of that, microcode single stepping obviously does not work – after all, there is no microcode. And I’m not quite sure that the instruction single stepping shows all the right values, or if the LEDs are updated at the appropriate time – when pressing or releasing the switches, that kind of thing. But I think that overall I’m pretty close.

So, what’s next? Oscar and I were thinking on making a simple interface board to easily connect the console to the DE0Nano board – nothing complex needs to be done, it is just a matter of connecting the pins on the console board to the proper pins on the FPGA. But we haven’t gotten around to that yet. So, for now, the best thing is a bunch of wires, similar to what I’ve been using for my test setup – those 40-pin breakout cables that the Raspberry Pi community use are very helpful. And, if you use a DE0Nano board like I am, you’ll also still need to hook up serial port and SD card. For that reason, I’m not yet distributing bitstreams for the console – getting it to work is not yet for the faint of heart. But, the latest sources are on the download page – if you’re thinking of building a bitstream for the console, the directory cons-de0n-basic is the place to start.

And now, it is high time that I start working on SDHC support – but, it’s not the first time I said that, and, the roof still needs fixing…

Stack limit

Some weeks ago I was involved in a discussion about how the leds on the 11/70 should work – more specifically, how to deal with the differences in the ‘real’ hardware and Oscar Vermeulen’s PiDP-11 console. I had what I thought was a rather nice idea, but it wasn’t received very well – and, given the lack of real and working 11/70 systems about, it wasn’t very easy to find out what was ‘right’. So I thought about it for a while, and decided to focus on something else for a while. The idea I came up with was to revisit the old 11/70 test programs. The first one in the set, EKBA, I had already managed to run flawlessly, but I didn’t spend much time with the second one, EKBB.

Maybe it was my subconscious playing a trick, because EKBB is – as far as I know, at least – the only program that includes a console test… and that very quickly proved that my nice idea for the console wasn’t working at all. But after reverting it, I then decided to have a look at all the other error messages that EKBB was throwing at me. Mainly these were in two categories – DIV condition codes and stack limit behaviour.

The DIV condition codes caused a bit of a headache – again, I should probably say, but because the last time I looked at this bit of core is already 8 years ago, the details had slipped a bit. I did manage to fix a couple of the error – messages, I should probably add, because functionally it did work correctly already; what the tests do is determine at which point the DIV instruction is aborted in a number of edge cases such as divide by zero.

More interesting really were the errors about the stack limit.

Originally, PDP2011 was going to be something like an 11/94 – since that seemed the most interesting model, and also I had the listings for the ZKDJ test that showed the actual workings of the machine in much greater detail than the manuals did. When that worked, I added the other models mostly by selectively disabling bits of the core for 11/94. But, 11/94 may have the highest number, but it isn’t in all respects the most complex machine – and, one of those is the stack limit, which is a lot more complex and different in 11/70 (and 11/45 too, for that matter). And, the version that I had implemented might pass the tests for the J-11 cpus, 11/34 and 11/44, but it certainly did not pass the tests for 11/70.

Turns out I had misunderstood quite a bit of the way it is supposed to work. For instance, I had assumed that the initial (after reset) value of the stack limit register should be 400. But actually, it should be 0 – and the limit of 376 and 340 above that is arranged in logic. And, even more of a surprise, the stack limit mechanism also protects the PSW from being overwritten by the stack – and in the 11/45, even more internal registers are.

So as usual the interesting question is, how can it be that PDP2011 systems of all possible configurations – including quite a few 11/70 – have run since November 2011 and this bug wasn’t ever found? I’d speculate that the operating systems usually don’t run into yellow or red stack traps – and if they do, it is probably a secondary effect of something else going wrong. If that is the case, the errors wouldn’t be recoverable, and then it doesn’t matter so much if the trap mechanism doesn’t work entirely as it should.

Anyway, it’s fixed now. Not that EKBB now passes flawlessly – there are a few puzzles left in it. But first up now is to go back to the console and the leds. And oh, what I almost forgot – thanks to Jörg Hoppe for providing the listings of these tests, and obviously Al Kossow too for everything Bitsavers. None of this would be possible without freely accessible documentation.

Booting 11/70

Booting a PDP-11 is something that I have maybe overlooked a bit, in trying to approach the ‘real thing’. In the history of PDP2011, it’s not that long ago really that I added the M9312 boot roms option – and I really still prefer my own boot code. Partly because PDP2011 can be different models with different peripherals according to the configuration, and my own boot code shows what has been configured. Easy to keep track of what kind of system is in an FPGA that way. And also faster.

However, the M9312 boot roms and the monitor included in them have certainly proved their value. For one, the monitor works with Jörg Hoppe’s PDP11GUI,  allowing loading and dumping of memory and disks – which, if nothing else, opens up the possibility of easily copying disk images to and from a PDP2011 system, other than physically removing SD cards – to the point that I’m now actually considering other flash memory media besides SD cards. For instance because those other flash media could potentially be lots cheaper. Very interesting for designing a shim board for connecting to Oscar Vermeulen’s console, potentially adding a couple low cost flash components for the disks instead of the SD card connectors…

And that brings me to the subject that’s been on my mind. Because Oscar’s console is very definitely an 11/70, and 11/70 is one of the models of PDP11 that had a very specific different way of booting – even if it had the same regular M9312 in it, there was a specific boot rom for it, with its specific tests, without the monitor, and with a specific method of booting.

In general, PDP11 hardware would ‘boot’ using the power fail trap vector 024, and 11/70 follows this pattern. The M9312 would then detect the boot, and during the memory cycles to fetch the trap vector and PS the M9312 would ‘wire-or’ the values set on its micro switches to make the processor load the vector from its boot roms – one bigger 512 word rom for diagnostics and the monitor, or in case of the 11/70 for diagnostics only; and 4 smaller 128 word roms for booting from many different peripherals – at least 20 different types of disks supported by DEC alone, but also magnetic tape units, paper tape readers, punch card readers, and network cards – serial and Ethernet. So the most important thing about booting for an 11/70 administrator would be to choose the device boot roms, and set the switches (the ‘address offset switch bank $1’) on the M9312 card to the preferred boot medium – or to the diagnostics.

The switches on the M9312 card could be used to make the cpu to start the boot code in one of the small roms directly – most likely booting your preferred operating system from one of the hard disks. But you could also set it to start at the diagnostics code in the lower rom, and then use the console switches to determine to which location in the smaller device specific boot roms to jump.

And that’s what I’ve been thinking about – how to do that for PDP2011. With Oscar’s console, it is obviously possible to let the system boot in the 11/70 console style, have it run the specific 11/70 rom with its diagnostics, and then boot from one of the roms according to the setting on the console switches. But… well, I’m not sure what that would add. Booting the fpga PDP11 isn’t really going to be ‘really’ the same as the ‘real thing’, ever – for one, the power fail vector doesn’t really make sense like it did in the days of core memory. Nor can an fpga do wired or – sure I can work my way around that with another multiplexer implied from another if statement in the code, but it’d seem a bit awkward, and especially in the address calculation, I can really miss another layer of complexity. It wouldn’t make the system run any faster, that’s for sure.

So, what is on my mind is that while it isn’t really the way that a ‘real’ 11/70 would boot, the M9312 monitor is actually probably better in terms of flexibility and user friendliness. And for those that would rather directly boot from a specific device without bothering with console interaction, it’s fairly easy to do so by reconfiguring the start address in the PDP2011 code – basically, today’s equivalent of setting switches on the M9312 card. And, well, obviously it would be possible to add physical switches on a shim card, or use switches that are on the fpga board, or some combination – but on the target board that I’m working on now, the de0nano, there aren’t enough switches and I’d rather use them for something else probably.

In short, I’m a bit hesitant to add the special /70 boot rom – I’m not saying that I never will, but I think the monitor rom is far easier and more flexible to use, and for fixed setups the old style pdp2011 roms will probably work better, maybe in combination with a changed start address in the top source file. If I’m going to add it, it’ll probably not be the default. That should be the monitor, I think.

Ingres!

After the summer, I’ve picked up work on the interface to Oscar Vermeulen’s PiDP11 console – what was left to do was the virtual settings on the address rotary switch and the actual values on the address and data lights. It mostly works now, and I’ve come to the point that I need to take a step back from it, let it rest for a while and come back to it in a couple of days, maybe a week or so – to avoid getting blind to the things that aren’t right yet. Meantime I’ve sent a preview to a beta tester, and I’m anxiously awaiting his comments…

So now it’s time to just play with the machine! and the first thing on my mind to dive into was Ingres. One of the oldest real relational database systems, and with a long and rich history. I knew it was included in 2.11BSD, but when I tried it out years ago when I first got 2.11BSD to run, it didn’t work… all the commands core dumped. So it needed a bit more work – and after quite a bit of tinkering and experimenting, it turned out to be quite easy – as usual if you know the answer. At first, I tried rebuilding the Ingres sources as root, but that doesn’t work quite right – it can be done, but it’s a lot easier to run the make as the ingres user.

So, what needs to be done is this:

  1. Reconfigure the kernel to include the Ingres lock driver – in other words, the INGRES option (on the last line of the config file) should be set to YES. And obviously then recompile the kernel, install it and reboot the machine – and all of that using root, as usual.
  2. Login to the ingres user, change into the source directory, and run make – if you thought the kernel took a bit to recompile, well, this takes a bit longer.
  3. Change into the demo directory, and create the demo database by running ./demodb demo

And after that, the famous ’emp’ tables are ready for use. One surprise though – I must have known this in the day, but I forgot – this version of Ingres doesn’t use SQL, but it’s own language: QUEL. So ‘select * from emp’ doesn’t work, I had to use some of the examples from the manual.

* range of e is employee
* retrieve (e.all) 
* \g
Executing . . .


|number|name                |salary|manage|birthd|startd|
|-------------------------------------------------------|
|   157|Jones, Tim          | 12000|   199|  1940|  1960|
|  1110|Smith, Paul         |  6000|    33|  1952|  1973|
|    35|Evans, Michael      |  5000|    32|  1952|  1974|
|   129|Thomas, Tom         | 10000|   199|  1941|  1962|
|    13|Edwards, Peter      |  9000|   199|  1928|  1958|
|   215|Collins, Joanne     |  7000|    10|  1950|  1971|
|    55|James, Mary         | 12000|   199|  1920|  1969|
|    26|Thompson, Bob       | 13000|   199|  1930|  1970|
|    98|Williams, Judy      |  9000|   199|  1935|  1969|
|    32|Smythe, Carol       |  9050|   199|  1929|  1967|
|    33|Hayes, Evelyn       | 10100|   199|  1931|  1963|
|   199|Bullock, J.D.       | 27000|     0|  1920|  1920|
|  4901|Bailey, Chas M.     |  8377|    32|  1956|  1975|
|   843|Schmidt, Herman     | 11204|    26|  1936|  1956|
|  2398|Wallace, Maggie J.  |  7880|    26|  1940|  1959|
|  1639|Choy, Wanda         | 11160|    55|  1947|  1970|
|  5119|Ferro, Tony         | 13621|    55|  1939|  1963|
|    37|Raveen, Lemont      | 11985|    26|  1950|  1974|
|  5219|Williams, Bruce     | 13374|    33|  1944|  1959|
|  1523|Zugnoni, Arthur A.  | 19868|   129|  1928|  1949|
|   430|Brunet, Paul C.     | 17674|   129|  1938|  1959|
|   994|Iwano, Masahiro     | 15641|   129|  1944|  1970|
|  1330|Onstad, Richard     |  8779|    13|  1952|  1971|
|    10|Ross, Stanley       | 15908|   199|  1927|  1945|
|    11|Ross, Stuart        | 12067|     0|  1931|  1932|
|-------------------------------------------------------|

continue
*

A little bit more complex example: calculating the average salary for the employees working for each manager:

* range of e is employee
* retrieve (e.manager, avgsal=avg(e.salary by e.manager))
* \g
Executing . . .


|manage|avgsal    |
|-----------------|
|    10|  7000.000|
|     0| 19533.500|
|    32|  6688.500|
|    33|  9687.000|
|    13|  8779.000|
|    55| 12390.500|
|    26| 10356.333|
|   199| 11117.556|
|   129| 17727.667|
|-----------------|

continue
*

and then of course it would be nice to add another column with the name of the manager. Simple, add another view on the same table and match the number to the manager id:

* range of e is employee
* range of m is employee
* retrieve (m.name, e.manager, avgsal=avg(e.salary by e.manager)) where e.manager=m.number
* \g
Executing . . .


|name                |manage|avgsal    |
|--------------------------------------|
|Ross, Stanley       |    10|  7000.000|
|Smythe, Carol       |    32|  6688.500|
|Hayes, Evelyn       |    33|  9687.000|
|Edwards, Peter      |    13|  8779.000|
|James, Mary         |    55| 12390.500|
|Thompson, Bob       |    26| 10356.333|
|Bullock, J.D.       |   199| 11117.556|
|Thomas, Tom         |   129| 17727.667|
|--------------------------------------|

continue
* 

But, oops. Now we’ve lost manager 0 – because there isn’t a row for manager 0 in the table. Maybe 0 means that there isn’t one, and that it’s the big boss who has manager 0 in the table? That would seem right for J.D. Bullock – he fits all the stereotypes, being the oldest, and earning the most of all employees – and he started working in the company the day he was born. But there’s also Stuart Ross, who started a year later, and earns a lot less. So, I’m not sure – maybe the sample data is intentionally confusing.

Anyway, this case of missing rows in the last query is a nice example of what would be easy to lift out of the data with an outer join, but I have no clue how to do that in QUEL, or if it’s even possible. Nothing to be found in the manuals I’ve seen so far.

Things are moving!

Blinkenlights, for instance.

It’s so hard to believe that it’s already almost been 3 years since my last post here.

Well, I did have to hack my own site – I didn’t remember the admin password. Still, it’s not really like nothing did happen in the meantime, just nothing that I felt was finished enough to merit a post – like, the experimental work I did on the faster cpu. Or the ideas I had for adding sdhc support. And then there were the preliminary discussions on Oscar’s PiDP11, and whether or not I could interface my vhdl pdp11 to that. Somehow all of that was still in the not-quite-ready-for-posting stage until now… and maybe it’s showing my age, I like to make things public when they’re finished and real, even though the current fashion is to start shouting when you’ve just got a plan but can’t be sure if it’ll ever fly yet.

Anyway, it’s real enough now, I’ve got a few setups blinking their lights at me now. No, the vhdl for the console interface isn’t quite ready yet, but the tricky bits are done. Since the pinouts of Oscar’s PiDP11, and the Raspberry Pi interface to that, don’t quite match the pinouts of the fpga boards, it looks like there’ll have to be a converter board – a ‘shim’, we’re calling it for now. And since there will be a couple pins left on the 40-pin interface, I’ll most likely add the bare essential peripherals to that shim too – most likely it’ll work out to just enough to connect a serial console and a sd card. Center of development now is the DE0-NANO board from Terasic – a big fpga with lots of IO connectors, a very good build quality, and widely available for about USD 80 – it’s unbeatable. But probably most of Terasic’s other boards will do fine as well, if they have two of the 40-pin connectors and if the fpga is big enough – I’m not sure that DE0 (without the -NANO) will still be big enough. Why two of the 40-pin connectors, you might ask, if the console is clearly using just one? well, I’m planning for a peripheral board and that would use the other connector.

Development version of the console
No that isn’t what the console will look like when it’s finished – it’s one of the pre-production boards that Oscar gave me to start development on, and what we call the ‘lab test animal’. Oscar fished it out of the bin for me to play with – the holes are not aligned correctly so it won’t fit nicely in the case, and the leds are not the right colour either, obviously – but it’s just fine for the development I’m now doing. Just to show you the setup that I’m now working on 😉

Functionally, most of the lights and switches already work. Most of the work still to be done is around the rotary switches (with the mmu console modes) and some of the lights that the fpga PDP11 never needed – such as the run/pause/master, for instance. That might still take lots of time, but it’s getting there.

The finished console of course has the nice switches and rich red leds, and the beautiful panel to hide the PCB behind. And of course the custom injection molded  case… check Oscar’s site at http://obsolescence.wixsite.com/obsolescence/pidp-11 to see more.

That’s my setup that’s now running Oscar’s PiDP11 for comparison and for playing, obviously! And, note how the white lamp test switch is not quite aligned with the rest of the switches, that’s entirely my fault in being in too much of a hurry to build the kit…

So that’s it for today, and I’ll try to post a bit more regular to keep you up to speed on what’s going on with the PDP2011. Over the next weeks I’ll be working to get the vhdl for the front panel working correctly, and also to get the design of the shim finalised. Hope to get that done before the summer comes 😉

Release

Finally, I’ve managed to find the time to finish up the new boot code, test everything, generate new bitstreams for the download page, and update the site.

There are now two different sets of boot roms to choose from. The sources in m9312l46.mac and m9312h46.mac are the – now almost unchanged – DEC M9312 boot roms, as described in the K-SP-M9312 documents you can find on Bitsavers. The only change I made is a tiny one that will allow you to use lower case input – even though the size of the roms is completely filled up by the original code, I found some room by removing a couple of instructions that read the switch settings on the original hardware that allowed to select whether or not diagnostics would be run before booting. The PDP2011 does not have these switches – diagnostics will always run.

The second set of boot roms is in the sources m9312l47.mac and m9312h47.mac – I used the additional rom space to make the original boot code a bit more elaborate. It now lists what is  in the device space of the system, before going on to the original way of booting – ie, boot from the first disk of the first controller it finds, in the order RK, RL, RH.

Which of the two sets to choose depends a bit on which kind of configuration you run, and what you’re going to do with it. The DEC version is more flexible, it allows you to boot from whichever disk is in the system – which is very useful if you have made a configuration with more than one disk controller in it. And the load and store commands are very easy to use if you are debugging the interface between the PDP2011 core and memory chips, as you would do when porting the PDP2011 to an FPGA board that I don’t support. On the other hand, if you’re using a simple configuration and are booting it a lot, then the ‘old’ style core is easier – nothing to do, it just boots.

As a side effect of adding the second M9312 boot rom at 165000, in addition to the one already there in the older PDP2011 versions at 173000, the internal bus structure of the system has become larger. No problem for all of the existing board setups that I distribute, except for one – the de0, that was already used to the max of it’s capacity with the older 1170-rpxunofp setup, now gets seriously cramped for resources. As a consequence, I’ve had to decrease the clock speed somewhat – it now runs at 6.25Mhz at the cpu, instead of the 10Mhz. Still remarkable, if you consider that this the 1170-rpxunofp has 3 actual PDP-11 cpu’s in it – one for the system itself, one for the DEUNA, and one for the embedded terminal. Interestingly, it seems to be snappier despite the lower clock speed when I access it over the network – it might be that the original clock speeds caused some kind of interference between the DEUNA code and the ENC chip.

I’ve also updated the site in several places, and added a couple of how-to pages to explain how to get started, how to run the system, and how to make your own configuration.

Next thing on the agenda is to redo the sd card core in the disk controllers – clean up the old core, and add sdhc support – which I’ve postponed for a long time already, but since regular sd cards are becoming increasingly difficult to find (and my own stock is also rapidly depleting) this is becoming a priority. I don’t have a plan yet when it will be finished though – as I’ve often said, PDP2011 is something to do in winter, and the only reason that I’ve just now found time to work on it is because of a spell of bad weather in The Netherlands.

Finishing up for today, I thought to give an example of what the device space list looks like with the new boot code. Here it is:

Hello, world [t47]: cpu 11/45 fpu
177776           psw
177774           slr
177772           pirq
177770           mbr
177676 - 177640  par
177636 - 177600  pdr
177576 - 177572  mmu
177570           sdr
177566 - 177560  kl
177546           kw
174406 - 174400  rl
173776 - 173000  m9312
172516           mmu
172376 - 172340  par
172336 - 172300  pdr
172276 - 172240  par
172236 - 172200  pdr
165776 - 165000  m9312

boot from rl:

which of course will look slightly different depending on the configuration.